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BY DR. T. KILBURN

Electrical Engineering Laboratories, University of Manchester

Reprinted with permission from Nature 168, 95

Copyright (1951) Macmillan Magazines Limited.

In a previous communication^{1}, a universal digital computing
machine was briefly described. That machine was experimental, and its purpose
was mainly to investigate the potentialities of a large-scale machine based on
the cathode ray tube^{2} and synchronized magnetic drum^{3} type of storage. The success of the machine made it possible to begin the
design in July 1949 of a new machine, which has just come into service.
Whereas this new machine is superficially the same as the experimental machine
in that it operates serially, uses the binary system of numbers and has the
same digit frequency of 100 kc./s., it has several improved features.

*Storage*.
Experience of the experimental machine
showed that the electronic storage capacity of 5,120 digits provided by two
cathode ray tubes was rather too small to permit flexibility of programming,
and that the subsidiary storage on the magnetic drum of 40,000 digits would be
quite inadequate for many problems. In the new machine the electronic storage
capacity has been increased to 10,240 digits, and improved operation of the
store has been obtained by halving the number of digits stored per tube, and
by using the defocus-focus system of storage^{2}. The magnetic storage
capacity has been increased to 150,000 digits, provision being made for a
further increase to a maximum of about 600,000 digits if this is necessary.
The magnetic drum is 6 in. in diameter, and along its length of 8 in. there is
sufficient space to accommodate 256 separate peripheral tracks. Each track
holds 2,560 useful digits; the packing density being 165 digits per inch. The
mechanism of reading from and writing on these tracks is described
elsewhere^{4}. The electronic store can be automatically loaded from,
or into, the magnetic store as a result of programmed instructions. These
instructions cause a transfer of information in which the contents of any
stated track are written on a stated pair of cathode ray tubes or vice versa.
Alternatively, if it is more convenient, the transfer of information may be
between one half-track and one cathode ray tube. In each case, the correctness
of transfer can be checked by a single instruction, and, in the case of an
incorrect transfer, the transfer can be repeated, or the machine stopped.

Selection of a particular track for reading is by electronic switching, and for writing, by relay switching.

The time taken for the check, and for any transfer, in which a track is read, is 36 msec. For a transfer in which information is written into a track, this time is increased to 63 msec. to allow time for the relay switching. This discrepancy between the times for reading and writing is not important, because reading is more frequent than writing. This is so because the sub-programmes required during computation are all stored on the magnetic drum.

*The accumulator*.
The facilities for performing
addition, subtraction and three logical operations have been retained,
together with signed and unsigned multiplication, in which the 80-digit
product of two 40-digit numbers is added to the content of the accumulator.
Multiplication in which the product is subtracted from the accumulator is a
new facility.

The most important engineering change of the accumulator is in the multiplying circuit. In the experimental machine the multiplication time which depended on the number of 1's in the multiplier, averaged about ten times that for addition. A study of available programmes revealed that if this multiplying circuit was used in the new machine, then about half the computing time of the machine would be spent in multiplication. Consequently, the speed of multiplication has been increased, and, in the new machine, an instruction involving multiplication is selected, interpreted and obeyed in 2.16 msec., as compared with a corresponding time of 1.2 msec. for addition, or any other 40-digit number operation. The increase in speed of multiplication is obtained by using a circuit consisting of a network of adders and delays, arranged in such a way that the sub-products are added together in one operation, instead of sequentially. Although some economy of equipment is achieved by carrying out the multiplication in two parts, controlled respectively by the first and second halves of the multiplier, nevertheless this type of multiplier is expensive and increases the size of the final machine by about 10 per cent (the machine contains 1,600 pentodes and 2,000 diodes). This, however, is judged to be worth while when balanced against the resulting overall increase in speed of operation of the machine.

To simplify the standardization of numbers during the course of computation, an instruction has been provided which produces in the accumulator a statement in binary form of the position of the most significant digit of any selected number in the electronic store.

In the near future, an additional circuit will be installed to generate (in 5.8 msec.) a 20-digit random number as a result of a single instruction. This instruction will be used in calculations concerned with stochastic processes.

*The B tube*.
This facility has been improved to
allow still greater flexibility and economy in programming. Eight 20-digit
storage locations can now be selected by the three '*b*-digits' of an
instruction, and thus any one of eight words may be added to an instruction
before it is used.

Further, the* B* tube has been provided with a subtracting circuit,
and a sign-testing circuit. Any line of the tube can therefore be used as a
20-digit accumulator for simple arithmetical processes. One important example
of this is in counting the number of times that a group of instructions has
been obeyed, cycling of control being conditional on the sign of a number in
the *B* tube. By this means four instructions are removed from any loop
in which counting is required.

The instructions provided enable a number from the electronic store to be
written into, or subtracted from, the *B* tube; or a number in the *B* tube to be written into the electronic store. The line of the *B* tube involved in these instructions is stated by the three
'*b*-digits'. To avoid the necessity for eight test circuits -- one for
each line -- the instruction 'test the sign of *B*' reads a single circuit,
which is recording the sign of the content of that line of the *B *tube
which was last used.

The time taken to read, interpret and obey these instructions is 960 microseconds.

*Input and output*.
The input and output is based on
teleprinter apparatus using 5-hole paper tape. The input uses a photo-electric
tape reader capable of reading 200 five-digit characters per second. The output
is by a mechanical tape-punch and/or teleprinter each capable of printing ten
characters per second.

The speed of input is approaching the maximum for this machine if an input programme is required to organize the input information. However, the speed of output, which is twenty times as slow, can only be justified if, in general, the time of output is smaller than, or comparable with, the input and computing times together. If this proves to be untrue, an alternative scheme for input and output which has been designed around punched cards, may be incorporated at a later date.

*Speed of operation.*
The basic rhythm of the
machine is determined by the length of the 20-digit instruction, and not by
the length of the 40-digit number. This increases the speed of operation of
the machine, as compared with that of the experimental machine, by a factor
between 1.8 and 2. If the improvements to the B tube, multiplier and other
parts of the machine are also included, the overall increase in speed is
probably not less than a factor of 3.

It should be noted that this increase has been obtained largely by reorganization, and not by the more difficult and expensive method of increasing the fundamental digit frequency.

*Programme of work.*
It is not proposed to limit the
programme of work on the machine to any particular type of problem, but to
cover a range of problems chosen for their diversity. Thus, in the immediate
future the following items are among those which will be investigated:
(1) partial differential equations arising out of biological calculations;
(2) simultaneous linear differential equations and matrix algebra, and their
application to the cotton and aircraft industries, and electricity
distribution; (3) tabulation of Laguerre functions; (4) design of optical
systems; (5) Fourier synthesis for X-ray crystallography; (6) design of plate
fractionating towers; (7) chess problems.

One aspect of the design of machines is to decrease the number of thermionic valves they contain. Thus, for example, it may be said that in the present machine the multiplication time is too nearly equal to the addition time, and that the size of the machine could be decreased by using a simpler multiplier, say, four times as slow in operation. However, with the present input speed of 1 character every 5 msec., it would then be impracticable to programme the input. One method of overcoming this would be to build circuits to organize the input data; not only would this reduce the flexibility of the programming method of input, but it would also nullify the original intention, which was to reduce the size of the machine. This argument can be extended to include other aspects of design such as the relative merits of serial and parallel machines, various forms of storage and so on. It can be seen that all aspects of machine design are related in a most intricate way, and because of this, the design of present machines has to be based to a great extent on the personal experience and intuitions of the individual designer. Consequently, one further important problem which the machine itself may solve is that when fed with input data describing the reliability of circuits, valves and other components, the speeds of operation of the various possible parts, and all other relative factors, it will give a more correct answer to the problem which still confronts engineers, namely, the design specification of the optimum universal computing machine.

The work described in this article is part of an investigation carried out jointly with Prof. F. C. Williams, in the Electrical Engineering Laboratory of the University of Manchester. I wish to acknowledge the assistance of Mr. G. C. Tootill and the members of the Computing Machine Laboratory and of the members of staff of Messrs. Ferranti, Ltd., who collaborated in the development, and who constructed the machine.

^{1} Kilburn, T., *Nature*, **164**, 684 (1949).

^{2} Williams, F. C., and Kilburn, T., *J. Inst.
Elec. Eng.*, **96**, Pt. III, No. 30 (1949).

^{3} Williams, F. C., and West, J. C., *J. Inst.
Elec. Eng.,* **98** Part II No.61 (1951).

^{4} Williams, F. C., Kilburn, T., and Thomas, G. E., *J.
Inst. Elec. Eng.* (in preparation).